From 5a5406a5cf831eeb4480b4344f44b6a4c0430a15 Mon Sep 17 00:00:00 2001
From: Lorenzo Figini <lorenzo.figini@istp.cnr.it>
Date: Tue, 10 Jun 2014 14:03:41 +0000
Subject: [PATCH] fix to initialisation in reflections module propagated to
 other branches

---
 src/reflections.f90 | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/reflections.f90 b/src/reflections.f90
index ffe59bd..6e04214 100644
--- a/src/reflections.f90
+++ b/src/reflections.f90
@@ -32,7 +32,8 @@ subroutine inters_linewall(xv,kv,rw,zw,nw,sint,normw)
   integer :: i,j,ni,iint
   real(r8), dimension(2) :: si,ti
   real(r8) :: drw,dzw,xint,yint,rint,l,kxy
-  real(r8) :: tol=sqrt(epsilon(1.0_r8))
+  real(r8) :: tol
+  tol=sqrt(epsilon(1.0_r8))
   sint=huge(sint)
   iint=0
   normw=0.0_r8